|
Editor |
Visualization |
||||
|
Internal representation detailsCompositeNDP │ provides out1 WU ⟨-,-,-,W⟩ > (socket:{TypeC,TypeA}×voltage:Fin {v110,v220,⊥}×frequency:Fin {f50,f60,⊥}×watts:SB(≥0)) │ requires in WU ⟨-,-,-,W⟩ > (socket:{TypeM}×voltage:Fin {v110,v220,⊥}×frequency:Fin {f50,f60,⊥}×watts:SB(≥0)) │ provides out2 WU ⟨-,-,-,W⟩ > (socket:{TypeC,TypeA}×voltage:Fin {v110,v220,⊥}×frequency:Fin {f50,f60,⊥}×watts:SB(≥0)) │ requires budget {6.31 USD} │ 12 nodes, 14 edges │ connected rec: ✓ │ _c required by _c ≤ required budget equiv (always satisfied) │ _c2 required by _c2 ≤ socket provided by _if equiv (always satisfied) │ provided out1 ≤ _muxed provided by _ir equiv id │ provided out2 ≤ _muxed provided by _ir1 equiv id │ _muxed required by _if ≤ required in equiv id │ frequency required by _ir ≤ frequency provided by _if equiv id │ socket required by _ir ≤ _res provided by _DP_Limits equiv id │ voltage required by _ir ≤ voltage provided by _if equiv id │ watts required by _ir ≤ _ir_watts provided by _sum equiv id │ frequency required by _ir1 ≤ frequency provided by _if equiv id │ socket required by _ir1 ≤ _res provided by _DP_Limits1 equiv id │ voltage required by _ir1 ≤ voltage provided by _if equiv id │ watts required by _ir1 ≤ _ir1_watts provided by _sum equiv id │ _result required by _sum ≤ watts provided by _if equiv id ├ _DP_Limits: SimpleWrap │ │ provides _res {TypeC,TypeA} │ - │ └ DP_True {TypeC,TypeA} ⇸ 𝟙 val = * > () │ true ├ _DP_Limits1: SimpleWrap │ │ provides _res {TypeC,TypeA} │ - │ └ DP_True {TypeC,TypeA} ⇸ 𝟙 val = * > () │ true ├ _c: SimpleWrap │ │ - │ requires _c {6.31 USD} │ └ DP_Constant 𝟙 ⇸ {6.31 USD} │ 6.31 USD ≤ 𝒓 ├ _c2: SimpleWrap │ │ - │ requires _c2 {TypeM} │ └ DP_Constant 𝟙 ⇸ {TypeM} │ TypeM ≤ 𝒓 ├ _if: SimpleWrap │ │ provides socket {TypeM} │ requires _muxed WU ⟨-,-,-,W⟩ │ │ provides voltage Fin {v110,v220,⊥} │ (socket:{TypeM}×voltage:Fin {v110,v220,⊥}×frequency:Fin {f50,f60,⊥}×watts:SB(≥0)) │ │ provides frequency Fin {f50,f60,⊥} │ │ │ provides watts SB(≥0) W │ │ └ DP_Id WU ⟨-,-,-,W⟩ ⇸ WU ⟨-,-,-,W⟩ │ └ Π<4> └ Π<4> │ ├ socket: {TypeM} ├ socket: {TypeM} │ ├ voltage: Fin {v110,v220,⊥} ├ voltage: Fin {v110,v220,⊥} │ ├ frequency: Fin {f50,f60,⊥} ├ frequency: Fin {f50,f60,⊥} │ └ watts: SB(≥0) └ watts: SB(≥0) │ 𝒇 ≤ 𝒓 ├ _ir: SimpleWrap │ │ provides _muxed WU ⟨-,-,-,W⟩ │ requires socket {TypeC,TypeA} │ │ └ (socket:{TypeC,TypeA}×voltage:Fin {v110,v220,⊥}×frequency:Fin {f50,f60,⊥}×watts:SB(≥0)) │ requires voltage Fin {v110,v220,⊥} │ │ │ requires frequency Fin {f50,f60,⊥} │ │ │ requires watts SB(≥0) W │ └ DP_Id WU ⟨-,-,-,W⟩ ⇸ WU ⟨-,-,-,W⟩ │ └ Π<4> └ Π<4> │ ├ socket: {TypeC,TypeA} ├ socket: {TypeC,TypeA} │ ├ voltage: Fin {v110,v220,⊥} ├ voltage: Fin {v110,v220,⊥} │ ├ frequency: Fin {f50,f60,⊥} ├ frequency: Fin {f50,f60,⊥} │ └ watts: SB(≥0) └ watts: SB(≥0) │ 𝒇 ≤ 𝒓 ├ _ir1: SimpleWrap │ │ provides _muxed WU ⟨-,-,-,W⟩ │ requires socket {TypeC,TypeA} │ │ └ (socket:{TypeC,TypeA}×voltage:Fin {v110,v220,⊥}×frequency:Fin {f50,f60,⊥}×watts:SB(≥0)) │ requires voltage Fin {v110,v220,⊥} │ │ │ requires frequency Fin {f50,f60,⊥} │ │ │ requires watts SB(≥0) W │ └ DP_Id WU ⟨-,-,-,W⟩ ⇸ WU ⟨-,-,-,W⟩ │ └ Π<4> └ Π<4> │ ├ socket: {TypeC,TypeA} ├ socket: {TypeC,TypeA} │ ├ voltage: Fin {v110,v220,⊥} ├ voltage: Fin {v110,v220,⊥} │ ├ frequency: Fin {f50,f60,⊥} ├ frequency: Fin {f50,f60,⊥} │ └ watts: SB(≥0) └ watts: SB(≥0) │ 𝒇 ≤ 𝒓 └ _sum: SimpleWrap │ provides _ir_watts SB(≥0) W │ requires _result SB(≥0) W │ provides _ir1_watts SB(≥0) W │ └ M_Res_AddMany_DP SB(≥0)×SB(≥0) ⟨W,W⟩ ⇸ SB(≥0) W 𝒇₁ + 𝒇₂ ≤ 𝒓 ├ Fs: ├ SB(≥0) W │ └ SB(≥0) W ├ opspace: SB(≥0) W └ algo: ApproximationAlgorithms - ApproximationAlgorithms.VAN_DER_CORPUT |
||||